(i) Field of the Invention
The present invention relates to a correlation circuit for spread spectrum communication used on a receiver side of a spread spectrum communication system in mobile communication or wireless LAN and, more particularly, to an RACH receiving apparatus for detecting an RACH with a simple and small construction.
(ii) Description of the Related Art
Generally, in a spread spectrum (SS) communication system used in mobile communication or wireless LAN (Local Area Network), on a transmission side, transmission data is subjected to a narrow band modulation (primary modulation) and further subjected to a spreading modulation (secondary modulation), namely, data is subjected to a two-stage modulation and then transmitted.
On a reception side, reception data is despread to be returned in the primary modulated state and a normal detecting circuit reconstructs a baseband signal.
According to a modulation system for a Preamble part regarding an RACH determined by 3GPP for W-CDMA, however, transmission data whose data rate is always constant is modulated with a kind of long code determined every sector and four kinds of phase rotations (of 45 degree, 135 degree, 255 degree, and 315 degree) and further modulated with 16 kinds of signatures (16 kinds of spreading codes). The signature has a 16-chip length and it is simply repeated 256 times (cited document: 3GPP Specifications: 3GTS25.213 and the like).
The RACH is divided into the Preamble part and a Message part. When a base station does not yet register a mobile station, the mobile station first transmits a Preamble part to the base station in a bursting manner in accordance with a procedure determined by the specification. The base station detects it. When detecting it, the base station transmits an answer in the state of an AICH. The mobile station receives it and, after that, transmits a Message part. It is important for the base station how the Preamble part transmitted in a bursting manner is detected.
Since a phase for the burst transmission is not established, an MF (Matched Filter) as shown in FIG. 11 is used for reception of the RACH so far. FIG. 11 is a block diagram of a conventional RACH demodulating unit.
The MF uses sign codes in which signatures, long codes, and phase rotations are set, and waits for input signals in a window having a certain range.
Since the phase rotations are complex, generally, the MF comprises: a reception data register 92 including two registers provided for an in-phase component and a quadrature component (hereinbelow, referred to as an I component and a Q component) of an input signal; a code register 93 including two registers provided for the I component and Q component; a code product-sum operation unit 94 for performing four kinds of product-sum operations; and a complex operating unit 99 for adding the results of the four kinds of product-sum operations to complete the complex operation.
As for the kinds of signatures, there are 16 kinds in total. It is unnecessary to correspond to all of the 16 kinds at once. It is sufficient to provide some kinds among them. The code registers 93, code product-sum operation units 94, and complex operating units 99 are needed as much as the number of the kinds of signatures.
The size of the window of the MF is determined by a period of time to get there and back from the base station to the mobile station, namely, it is determined by the radius of a cell which the base station covers. For example, when the cell radius is set to 15 km, the period of time (during which a signal gets there and back in such a manner that the base station→mobile station→base station) is about 100 μs. When it is expressed by the number of chips, it is about 256 chips. The size of the window needed for the MF is 256 chips or more. That is, the MF waits for the signatures having a 16-chip length repetitively for a period of time corresponding to a 256-chip length. In the MF of FIG. 9, the size of the window is set to 256 chips.
When the cell radius is set to 50 km, the window has a size of 1284 chips or more. The reason is as follows. As observed from the base station, since the base station does not know where the mobile station exists in the range covered by the base station, the base station has to detect such signals (RACH) for the nearest mobile station and the farthest mobile station. When the period of time passes as much as such window time, the MF detects the Preamble part by replacing the signatures to the subsequent long codes and repeating the same operation 256 times.
Timing during which the mobile station can transmit the Preamble part is determined. It is limited to an up-link access slot formed by using P-CCPCH always transmitted from the base station as a reference. Therefore, the above-mentioned relation is satisfied.
The conventional RACH demodulating unit will now be described with reference to FIG. 11.
The demodulating unit shown in FIG. 11 comprises: the reception data register 92; code register 93; code product-sum operation unit 94; and complex operating unit 99. The constitution is the normal constitution of the MF.
An input signal is subjected to a code division multiple access (CDMA) modulation and then transmitted. Analog signals (two signals of the I component and Q component) received by an antenna (not shown) are converted into digital signals by an A/D converter (analog/digital converter) 91.
The A/D converter 91 uses a clock higher than a chip time interval during the conversion. The input signals are oversampled. As for a sampling rate, it is set to 4-times oversampling in FIG. 9. Accordingly, a signal of 256 chips corresponds to a signal of 1024 samples. The number of output bits of the A/D converter 91 denotes plural numbers. 4 to 8 bits are used.
The code register 93 includes registers for generating sign codes serving as the same spreading codes as those used for the CDMA modulation on the transmission side. One register comprises F/Fs (Flip-Flop) of 256 taps. Sign codes in which the long codes, signatures, and phase rotations are operated are registered in the code register 93 and the code is replaced with one subsequent to the code every 256-chip time.
The code register 93 includes two registers for generating I-component and Q-component sign codes, respectively. As a code register 93, a code generator itself can be also used.
The reception data register 92 includes registers for receiving digital-converted input signals and sequentially shifting them every sampling time. One register comprises F/Fs of 1024 taps and has output terminals for outputting codes to the code product-sum operation unit 94 every 4 taps. Since there are two kinds of input signals of the I component and Q component, two registers are needed in the reception data register 92.
The code product-sum operation unit 94 multiplies a value generated every 4 taps of the reception data register 92 and a value of the code register (256 taps) 93 and adds all of the multiplication results. Accordingly, the scale of the hardware is large.
For the complex operation, the code product-sum operation unit 94 needs product-sum operation units for performing four kinds of product-sum operations. In the code product-sum operation unit 94, the product-sum operation of the I-component input signal and the I-component code, product-sum operation of the Q-component input signal and the I-component code, product-sum operation of the Q-component input signal and the Q-component code, and product-sum operation of the I-component input signal and the Q-component code are executed, respectively.
The complex operating unit 99 adds and subtracts four outputs of the code product-sum operation unit 94 to complete the complex operation. That is, the unit adds the product-sum operation result of the I-component input signal and I-component code and that of the Q-component input signal and Q-component code, and performs the subtraction of the product-sum operation result of the Q-component input signal and I-component code and that of the I-component input signal and Q-component code.
The constitution of the MF shown in FIG. 11 can obtain a correlation output of the input signal according to one kind of signature. Accordingly, when the number of signatures is increased, the constitution in a portion surrounded by a broken line has to be increased as much as the increased number. The reception data register 92 can be used in common irrespective of the number of signatures.
The operation speed of the conventional MF in FIG. 11 is as follows.
An analog signal as reception data received by the antenna has been originally CDMA-modulated on the transmission side. The chip rate is equal to about 4 Mcps (to be accurate, 3.84 Mcps). When it is generally converted into a digital signal by an A/D converter, it is converted at a sampling rate of about 16 MHz (15.36 MHz) that is four times as high as the chip rate. Therefore, the operation speed of each of the subsequent code register 93, product-sum operation unit 94, and the like is equal to about 16 MHz.
Since the number of bits of a code to perform the CDMA modulation is equal to 1, the adders in the code product-sum operation unit 94 cover the greater part of the hardware scale of the MF in FIG. 11. The multiplier can be comprised of a logic circuit for, when a sign indicates “1”, generating an input signal as it is and, when it indicates “0”, merely inverting the sign of the input signal and generating the resultant signal. On the other hand, the adder has to perform the addition of long bits (6 bits to tens of bits), so that the hardware scale becomes large. As for the register, namely, F/Fs, it is sufficient to arrange F/Fs in parallel as much as the number of bits of the input signal.
As description regarding the conventional matched filter, “Multi-user Demodulating Method and Apparatus” (Applicants: Kokusai Electric Co., Ltd. and Yozan: KK, Inventors: Kenzo Urabe et al.) disclosed in Japanese Patent Laid-Open No. 9-200179/1997 made public on July 31, the 9th year of Heisei (1997) and the like are given.
As mentioned above, in the conventional MF, to detect the Preamble part of the RACH in the base station, the complex MF is needed as much as the number of signatures, so that there are such problems that the number of gates is increased, the circuit scale is increased, and the cost of LSI to construct the MF is raised.